The quad flat non-leaded package is a semiconductor package unit that the bottom of the die pad and the leads are exposed from the bottom surface of a package encapsulant. The surface-mounting technique is generally used for mounting the semiconductor package on a printed circuit board, so as to form a circuit module with a specific function.
Referring to FIG. 2, U.S. Pat. No. 7,795,071 discloses a quad flat non-leaded package. The quad flat non-leaded package has an insulating layer 25, and a plurality of traces 26 and connection pads 27 embedded in the insulating layer 25. The traces 26 and the connection pads 27 are exposed from the insulating layer 25 and co-planar therewith. A semiconductor chip 28 is disposed on the traces 26; and a package encapsulant 29 is formed on the insulating layer 25 so as to encapsulate the semiconductor chip 28. As the traces 26 are formed between the two connection pads 27, and the semiconductor chip 28 is attached to the traces 26 through the bumps 30, there exists a problem of insufficient bonding strength between the bumps 30 and the traces 26 resulting from the co-planarity of the traces 26 and the insulating layer 25. In addition, the spacing for flowing the package encapsulant 29 between any two adjacent traces 26 is merely contributed by the height of the bumps 30. As such, since the package encapsulant 29 is not easy to flow into the spacing, it is easily to generate voids 31, resulting in popcorn concern and low yield.
Therefore, how to provide a semiconductor package and a method of fabricating the same to solve the problems and to improve the yield has been becoming one of the critical issues in the art.